In the past few decades, Dynamic Random Access Memories (DRAMs) have been delivering higher density but slower speed, and Static Random Access Memories (SRAMs) the higher speed but lower density. These two memory types have been developed separately, following their own technological development curves for density and speed. Recently, embedded memory of DRAM and SRAM began to emerge. Embedded memory is memory on the same “chip” as a processor. Currently, each of DRAM and SRAM also faces its own technology challenge along its particular scaling path, namely due to high standby and active leakage current (both sub-threshold and tunneling), threshold voltage variation and mismatch. Embedded memory opens up possibilities and demands for new memory cells for better optimization and trade-off between speed, area, power, retention time, soft error rate, and technology parameters such as threshold voltages and leakage currents. Embedded memory on a chip will generally be deployed onto specific processors or Application Specific Integrated Circuits (ASICs), based on the chip and application requirements.
DRAM, in particular, would be useful for embedded memory and the cells thereof if the DRAM could be made smaller and substantially faster, and be suitable for smaller voltages, as voltages are continuing to decrease.
Thus, there is a need to provide improved memory cells and memories using the cells.